@spec abandon_downstream_bus(t()) :: {:ok, t()} | {:error, term()}

Abandon the downstream bus.

@spec acquire(acquire_options()) :: {:ok, t()} | {:error, reason :: any()}

Acquire a connection to the PCA9641 device using the passed in I2C connection.

Options:

• conn (required) an I2C connection, probably from ElixirALE.I2C or Circuits.I2C.
• int_pin a (optional) GPIO connection for the interrupt pin This should be already set to direction :in.

@spec bus_connect(t(), boolean()) :: {:ok, t()} | {:error, term()}

BUS_CONNECT

Connectivity between master and downstream bus; the internal switch connects I2C-bus from master to downstream bus only if LOCK_GRANT = 1.

• false -> Do not connect I2C-bus from master to downstream bus.
• true -> Connect downstream bus; the internal switch is closed only if LOCK_GRANT = 1.

@spec bus_connect?(t()) :: boolean()

BUS_CONNECT

Connectivity between master and downstream bus; the internal switch connects I2C-bus from master to downstream bus only if LOCK_GRANT = 1.

• false -> Do not connect I2C-bus from master to downstream bus.
• true -> Connect downstream bus; the internal switch is closed only if LOCK_GRANT = 1.

@spec bus_hung?(t()) :: boolean()

BUS_HUNG

This is a read-only status register bit. If this register bit is ‘0’, it indicates the bus is in normal condition. If this bit is ‘1’, it indicates the bus is hung. The hung bus means SDA signal is LOW and SCL signal does not toggle for more than 500 ms or SCL is LOW for 500 ms.

• false -> Normal operation.
• true -> Downstream bus hung; when SDA signal is LOW and SCL signal does not toggle for more than 500 ms or SCL is LOW for 500 ms.

@spec bus_hung_interrupt?(t()) :: boolean()

BUS_HUNG_INT

Indicates to both masters that SDA signal is LOW and SCL signal does not toggle for more than 500 ms or SCL is LOW for 500 ms.

• false -> No interrupt generated; normal operation.
• true -> Interrupt generated; downstream bus cannot recover; when SDA signal is LOW and SCL signal does not toggle for more than 500 ms or SCL is LOW for 500 ms,

@spec bus_hung_interrupt_enabled?(t()) :: boolean()

BUS_HUNG_MSK

• false -> Enable output interrupt when BUS_HUNG function is set.
• true -> Disable output interrupt when BUS_HUNG function is set.

@spec bus_init(t(), boolean()) :: {:ok, t()} | {:error, term()}

BUS_INIT

Bus initialization for PCA9641 sends one clock out and checks SDA signal. If SDA is HIGH, PCA9641 sends a ‘not acknowledge’ and a STOP condition. The BUS_INIT function is completed. If SDA is LOW, PCA9641 sends other clock out and checks SDA again. The PCA9641 will send out 9 clocks (maximum), and if SDA is still LOW, PCA9641 determines the bus initialization has failed.

• false -> Normal operation.
• true -> Start initialization on next bus connect function to downstream bus.

@spec bus_init?(t()) :: boolean()

BUS_INIT

Bus initialization for PCA9641 sends one clock out and checks SDA signal. If SDA is HIGH, PCA9641 sends a ‘not acknowledge’ and a STOP condition. The BUS_INIT function is completed. If SDA is LOW, PCA9641 sends other clock out and checks SDA again. The PCA9641 will send out 9 clocks (maximum), and if SDA is still LOW, PCA9641 determines the bus initialization has failed.

• false -> Normal operation.
• true -> Start initialization on next bus connect function to downstream bus.

@spec bus_initialisation_failed?(t()) :: boolean()

BUS_INIT_FAIL

This is a read-only status register bit. If this register bit is ‘0’, it indicates the bus initialization function has passed. The downstream bus is in idle mode (SCL and SDA are HIGH). If this register bit is ‘1’, it indicates the bus initialization function has failed. The SDA signal could be stuck LOW.

• false -> Normal operation.
• true -> Bus initialization has failed. SDA still LOW, the downstream bus cannot recover.

@spec bus_lost_interrupt?(t()) :: boolean()

BUS_LOST_INT

Indicates the master has involuntarily lost the ownership of the downstream bus.

• false -> No interrupt generated; this master is controlling the downstream bus.
• true -> Interrupt generated; this master has involuntarily lost the control of the downstream bus.

@spec bus_lost_interrupt_enabled?(t()) :: boolean()

BUS_LOST_MSK

• false -> Enable output interrupt when BUS_LOST function is set.
• true -> Disable output interrupt when BUS_LOST function is set.

@spec downstream_disconnect_on_timeout(t(), boolean()) ::
  {:ok, t()} | {:error, term()}

SMBUS_DIS

When PCA9641 detects an SMBus time-out, if this bit is set, PCA9641 will disconnect I2C-bus from master to downstream bus.

• false -> Normal operation.
• true -> Connectivity between master and downstream bus will be disconnected upon detecting an SMBus time-out condition.

@spec downstream_disconnect_on_timeout?(t()) :: boolean()

SMBUS_DIS

When PCA9641 detects an SMBus time-out, if this bit is set, PCA9641 will disconnect I2C-bus from master to downstream bus.

• false -> Normal operation.
• true -> Connectivity between master and downstream bus will be disconnected upon detecting an SMBus time-out condition.

@spec idle_timer_disconnect(t(), boolean()) :: {:ok, t()} | {:error, term()}

IDLE_TIMER_DIS

After RES_TIME is expired, I2C-bus idle for more than 100 ms, PCA9641 will disconnect master from downstream bus and takes away its grant if this register bit is enabled. This IDLE_TIMER_DIS function also applies when there is a grant of a request with zero value on RES_TIME.

• false -> Normal operation.
• true -> Enable 100 ms idle timer. After reserve timer expires or if reserve timer is disabled, if the downstream bus is idle for more than 100 ms, the connection between master and downstream bus will be disconnected.

@spec idle_timer_disconnect?(t()) :: boolean()

IDLE_TIMER_DIS

After RES_TIME is expired, I2C-bus idle for more than 100 ms, PCA9641 will disconnect master from downstream bus and takes away its grant if this register bit is enabled. This IDLE_TIMER_DIS function also applies when there is a grant of a request with zero value on RES_TIME.

• false -> Normal operation.
• true -> Enable 100 ms idle timer. After reserve timer expires or if reserve timer is disabled, if the downstream bus is idle for more than 100 ms, the connection between master and downstream bus will be disconnected.

@spec interrupt_clear(t(), :all | [interrupt_name()]) :: {:ok, t()} | {:error, term()}

Clear specific interrupts from the interrupt status register

@spec interrupt_enable(t(), :all | :none | [interrupt_name()]) ::
  {:ok, t()} | {:error, term()}

Enable the specified interrupts.

@spec interrupt_enabled(t()) :: {:ok, [interrupt_name()]} | {:error, term()}

Returns a list of atoms containing the

@spec interrupt_in_interrupt_enabled?(t()) :: boolean()

INT_IN_MSK

• false -> Enable output interrupt when INT_IN function is set.
• true -> Disable output interrupt when INT_IN function is set.

@spec interrupt_pin_disable(t()) :: {:ok, t()} | {:error, reason :: any()}

Disable interrupts on the int_pin.

Disables interrupts on the GPIO pin which is connected to the PCA9641 interrupt pin.

@spec interrupt_pin_enable(t()) :: {:ok, t()} | {:error, reason :: any()}

Enable interrupts on the int_pin.

Enables interrupts on the GPIO pin which is connected to the PCA9641 interrupt pin. The Wafer interrupt message metadata field will contain this PCA9641 conn.

@spec interrupt_pin_enable(t(), metadata :: any()) ::
  {:ok, t()} | {:error, reason :: any()}

Enable interrupts on the int_pin.

Enables interrupts on the GPIO pin which is connected to the PCA9641 interrupt pin. The Wafer interrupt message metadata field will contain a two-tuple of this PCA9641 conn and metadata.

@spec interrupt_reason(t()) :: {:ok, [interrupt_name()]} | {:error, reason :: any()}

Indicates the reasons for which an interrupt was generated (if any).

@spec interupt_in_interrupt?(t()) :: boolean()

INT_IN_INT

Indicates that there is an interrupt from the downstream bus to both the granted and non-granted masters.

• false -> No interrupt on interrupt input pin INT_IN.
• true -> Interrupt on interrupt input pin INT_IN.

@spec lock_grant?(t()) :: boolean()

LOCK_GRANT

This is a status read only register bit. Lock grant status register bit indicates the ownership between reading master and the downstream bus. If this register bit is 1, the reading master has owned the downstream bus. If this register bit is zero, the reading master has not owned the downstream bus.

• false -> This master does not have a lock on the downstream bus.
• true -> This master has a lock on the downstream bus.

@spec lock_grant_interrupt?(t()) :: boolean()

LOCK_GRANT_INT

Indicates the master has a lock (ownership) on the downstream bus.

• false -> No interrupt generated; this master does not have a lock on the downstream bus.
• true -> Interrupt generated; this master has a lock on the downstream bus.

@spec lock_grant_interrupt_enabled?(t()) :: boolean()

LOCK_GRANT_MSK

• false -> Enable output interrupt when LOCK_GRANT function is set.
• true -> Disable output interrupt when LOCK_GRANT function is set.

@spec lock_request(t(), boolean()) :: {:ok, t()} | {:error, term()}

LOCK_REQ

Lock request register bit is for a master requesting the downstream bus when it does not have a lock on downstream bus. When a master has a lock on downstream bus, it can give up the ownership by writing zero to LOCK_REQ register bit. When LOCK_REQ becomes zero, LOCK_GRANT bit becomes zero and the internal switch will be open.

• false -> Master is not requesting a lock on the downstream bus or giving up the lock if master had a lock on the downstream bus.
• true -> Master is requesting a lock on the downstream bus.

@spec lock_request?(t()) :: boolean()

LOCK_REQ

Lock request register bit is for a master requesting the downstream bus when it does not have a lock on downstream bus. When a master has a lock on downstream bus, it can give up the ownership by writing zero to LOCK_REQ register bit. When LOCK_REQ becomes zero, LOCK_GRANT bit becomes zero and the internal switch will be open.

• false -> Master is not requesting a lock on the downstream bus or giving up the lock if master had a lock on the downstream bus.
• true -> Master is requesting a lock on the downstream bus.

@spec mailbox_empty?(t()) :: boolean()

MBOX_EMPTY

This is a read-only status register bit. If this bit is ‘0’, it indicates other master mailbox is full, and this master cannot send more data to other master mailbox. If it is ‘1’, it indicates other master is empty and this master can send data to other master mailbox.

• false -> Other master mailbox is full; wait until other master reads data.
• true -> Other master mailbox is empty. Other master has read previous data and it is permitted to write new data.

@spec mailbox_empty_interrupt?(t()) :: boolean()

MBOX_EMPTY_INT

Indicates the sent mail is empty, other master has read the mail.

• false -> No interrupt generated; sent mail is not empty.
• true -> Interrupt generated; mailbox is empty.

@spec mailbox_empty_interrupt_enabled?(t()) :: boolean()

MBOX_EMPTY_MSK

• false -> Enable output interrupt when MBOX_EMPTY function is set.
• true -> Disable output interrupt when MBOX_EMPTY function is set.

@spec mailbox_full?(t()) :: boolean()

MBOX_FULL

This is a read-only status register bit. If this bit is ‘0’, it indicates no data is available in the mail box. If it is ‘1’, it indicates new data is available in the mail box.

• false -> No data is available for this master.
• true -> Mailbox contains data for this master from the other master.

@spec mailbox_full_interrupt?(t()) :: boolean()

MBOX_FULL_INT

Indicates the mailbox has new mail.

• false -> No interrupt generated; mailbox is not full.
• true -> Interrupt generated; mailbox full.

@spec mailbox_full_interrupt_enabled?(t()) :: boolean()

MBOX_FULL_MSK

• false -> Enable output interrupt when MBOX_FULL function is set.
• true -> Disable output interrupt when MBOX_FULL function is set.

@spec other_lock?(t()) :: boolean()

OTHER_LOCK

This is a status read-only register bit. Other master lock status indicates the ownership between other master and the downstream bus. If this register bit is ‘1’, the other master has owned the downstream bus. If this register bit is ‘0’, the other master does not own the downstream bus.

• false -> The other master does not have a lock on the downstream bus.
• true -> The other master has a lock on the downstream bus.

@spec priority(t(), boolean()) :: {:ok, t()} | {:error, reason :: any()}

PRIORITY

Master can set this register bit for setting priority of the winner when two masters request the downstream bus at the same time.

@spec priority?(t()) :: boolean()

PRIORITY

Master can set this register bit for setting priority of the winner when two masters request the downstream bus at the same time.

@spec read_mailbox(t()) :: {:ok, mailbox_data(), t()} | {:error, term()}

Read shared mailbox.

@spec request_downstream_bus(t()) :: {:ok, t()} | {:error, reason :: any()}

Attempt to acquire the downstream I2C bus.

@spec reserve_time(t()) :: {:ok, non_neg_integer(), t()} | {:error, term()}

@spec reserve_time(t()) :: {:ok, t()} | {:error, term()}

RES_TIME

Reserve timer. Changes during LOCK_GRANT = 1 will have no effect.

Returns {:ok, n} where n is the number if milliseconds remaining in the reservation.

RES_TIME

Reserve timer. Changes during LOCK_GRANT = 1 will have no effect.

ms is the number of milliseconds remaining in the reservation.

@spec scl_becomes_io(t(), boolean()) :: {:ok, t()} | {:error, term()}

SCL_IO

SCL becomes I/O pin; master can read or write to this register bit. If master reads this bit, the value is the state of the downstream SCL pin. Zero value means SCL is LOW, and one means SCL pin is HIGH. When master writes ‘0’ to this register bit, the downstream SCL pin will assert LOW. If master writes‘1’ to this register bit, the downstream SCL pin will be pulled HIGH. Remark: SCL becomes I/O pin only when BUS_CONNECT = 0 and LOCK_GRANT = 1.

• false -> When read, shows the SCL pin of the downstream bus is LOW. When written, PCA9641 drives SCL pin of downstream bus LOW.
• true -> When read, shows the SCL pin of the downstream bus is HIGH. When written, PCA9641 drives SCL pin of the downstream bus HIGH.

@spec scl_becomes_io?(t()) :: boolean()

SCL_IO

SCL becomes I/O pin; master can read or write to this register bit. If master reads this bit, the value is the state of the downstream SCL pin. Zero value means SCL is LOW, and one means SCL pin is HIGH. When master writes ‘0’ to this register bit, the downstream SCL pin will assert LOW. If master writes‘1’ to this register bit, the downstream SCL pin will be pulled HIGH. Remark: SCL becomes I/O pin only when BUS_CONNECT = 0 and LOCK_GRANT = 1.

• false -> When read, shows the SCL pin of the downstream bus is LOW. When written, PCA9641 drives SCL pin of downstream bus LOW.
• true -> When read, shows the SCL pin of the downstream bus is HIGH. When written, PCA9641 drives SCL pin of the downstream bus HIGH.

@spec sda_becomes_io(t(), boolean()) :: {:ok, t()} | {:error, term()}

SDA_IO

SDA becomes I/O pin; master can read or write to this register bit. If master reads this bit, the value is the state of the downstream SDA pin. Zero value means SDA is LOW, and one means SDA pin is HIGH. When master writes ‘0’ to this register bit, the downstream SDA pin will assert LOW. If master writes‘1’ to this register bit, the downstream SDA pin will be pulled HIGH. Remark: SDA becomes I/O pin only when BUS_CONNECT = 0 and LOCK_GRANT = 1.

• false -> When read, indicates the SDA pin of the downstream bus is LOW. When written, PCA9641 drives SDA pin of downstream bus LOW.
• true -> When read, indicates the SDA pin of the downstream bus is HIGH. When written, PCA9641 drives SDA pin of the downstream bus HIGH.

@spec sda_becomes_io?(t()) :: boolean()

SDA_IO

SDA becomes I/O pin; master can read or write to this register bit. If master reads this bit, the value is the state of the downstream SDA pin. Zero value means SDA is LOW, and one means SDA pin is HIGH. When master writes ‘0’ to this register bit, the downstream SDA pin will assert LOW. If master writes‘1’ to this register bit, the downstream SDA pin will be pulled HIGH. Remark: SDA becomes I/O pin only when BUS_CONNECT = 0 and LOCK_GRANT = 1.

• false -> When read, indicates the SDA pin of the downstream bus is LOW. When written, PCA9641 drives SDA pin of downstream bus LOW.
• true -> When read, indicates the SDA pin of the downstream bus is HIGH. When written, PCA9641 drives SDA pin of the downstream bus HIGH.

@spec smbus_software_reset(t(), boolean()) :: {:ok, t()} | {:error, term()}

SMBUS_SWRST

Non-granted or granted master sends a soft reset, if this bit is set, PCA9641 sets clock LOW for 35 ms following reset of all register values to defaults.

• false -> Normal operation.
• true -> Enable sending SMBus time-out to downstream bus, after receiving a general call soft reset from master.

@spec smbus_software_reset?(t()) :: boolean()

SMBUS_SWRST

Non-granted or granted master sends a soft reset, if this bit is set, PCA9641 sets clock LOW for 35 ms following reset of all register values to defaults.

• false -> Normal operation.
• true -> Enable sending SMBus time-out to downstream bus, after receiving a general call soft reset from master.

@spec test_interrupt_interrupt_enabled?(t()) :: boolean()

TEST_INT_MSK

• false -> Enable output interrupt when TEST_INT function is set.
• true -> Disable output interrupt when TEST_INT function is set.

@spec test_interrupt_pin(t(), boolean()) :: {:ok, t()} | {:error, term()}

TEST_INT

Test interrupt output pin; a master can send an interrupt to itself by writing ‘1’ to this register bit. Writing ‘0’ to this register bit has no effect. To clear this interrupt, master must write ‘1’ to TEST_INT_INT in Interrupt Status register.

• false -> Normal operation.
• true -> Causes PCA9641 INT pin to go LOW if not masked by TEST_INT_INT in Interrupt Mask register. Allows this master to invoke its Interrupt Service Routine to handle housekeeping tasks.

@spec test_interrupt_pin?(t()) :: boolean()

TEST_INT

Test interrupt output pin; a master can send an interrupt to itself by writing ‘1’ to this register bit. Writing ‘0’ to this register bit has no effect. To clear this interrupt, master must write ‘1’ to TEST_INT_INT in Interrupt Status register.

• false -> Normal operation.
• true -> Causes PCA9641 INT pin to go LOW if not masked by TEST_INT_INT in Interrupt Mask register. Allows this master to invoke its Interrupt Service Routine to handle housekeeping tasks.

@spec test_interrupt_pin_interrupt?(t()) :: boolean()

TEST_INT_INT

Indicates this master has sent an interrupt to itself.

• false -> No interrupt generated; master has not set the TEST_INT bit in STATUS register.
• true -> Interrupt generated; master activates its interrupt pin via the TEST_INT bit in STATUS register.

@spec verify_identity(t()) :: {:ok, t()} | {:error, reason :: any()}

Verify the contents of the identity register.

It should match the expected value of 56.

@spec wait_for_bus_init(t()) :: {:ok, t()} | {:error, :bus_init_fail}

Waits for downstream bus initialisation to succeed.

Waits for a maximum of 1 second.

@spec write_mailbox(t(), mailbox_data()) :: {:ok, t()} | {:error, term()}

Write shared mailbox.