Sets the receive pin interrupt so that the next incoming packet triggers an {:ok, :interrupt_received} message to the caller so that the fifo buffer can be processed to decode the packet.

Cancels the recieve pin interrupt. The interrupt is canceled under normal conditions when a response message is triggered, but in the case of a timeout where the caller no longer has interest in the next packet, this function can be used.

Initializes the SPI device and the reset and interrupt pins and prepares the RFM69 chip for interaction.

Read burst operations happen similarly to write_burst, where the first byte is the register location, and each subsequent byte sent (the value of the tx byte doesn’t matter) results in a byte read with the value of that register location using the same auto-incrementing as in writes.

Read single is a subtype of read_burst where only the location byte and a “don’t care” byte are sent in the frame and the second byte returned is the register value.

Sets the reset GPIO pin high long enough to power cycle the RFM69 chip

Accepts the SPI device (eg “spidev0.0”), the reset and interrupt GPIO pin numbers and initializes communication with the RFM69 chip.

Writing to one or more configuration register locations is done via a “write burst”, where the first byte transferred over SPI is the location logically ORed with 0x80 (the write bit), the second byte is the value for that register location, and each subsequent sent byte is stored in the proceeding register locations. The RFM69 chip auto-increments the register location for each byte so that a single frame of bytes can write the entire register configuration.

Writes a full configuration struct to the registers on the chip.

Sets the frequency to the appropriate chip registers

Write single is a subtype of write_burst where only the location byte and a single value byte are sent in the frame.